You can also find my articles on my Google Scholar profile.

Book Chapter

B1. Dealing with Aging and Yield in Scaled Technologies

Journal Articles

J1. Generative Learning in VLSI Design for Manufacturability: Current Status and Future Directions

Conference Papers

C10. Re-examining VLSI Manufacturing and Yield through the Lens of Deep Learning

C9. TEMPO: Fast Mask Topography Effect Modeling with Deep Learning

C8. LithoGAN: End-to-End Lithography Modeling with Generative Adversarial Networks

C7. Litho-GPA: Gaussian Process Assurance for Lithography Hotspot Detection

C6. Tackling Signal Electromigration with Learning-Based Detection and Multistage Mitigation

C5. LithoROC: Lithography Hotspot Detection with Explicit ROC Optimization

C4. Machine Learning for Yield Learning and Optimization

C3. Power Grid Reduction by Sparse Convex Optimization

C2. Placement Mitigation Techniques for Power Grid Electromigration

C1. Standard Cell Layout Regularity and Pin Access Optimization Considering Middle-of-Line